rmustacc: i don't suppose you recall what your plans were for ice when you end up with fewer interrupts available than # of tx+rx rings? (e.g. msi or legacy INTA/B/C/D) if you even had thought about that yet?

hi

BTW, I have half-baked bnxt implementation (based on Robert's initial work) over at github.com/yuripv/illumos/tree/bnxt if anyone wants to give it a try, it's far from ideal, but seems to work so far (improving it as time permits)

i hope it's not nearly as complicated as ice is :)

its interface (HWRM) looks so much nicer than what I've seen in e.g. igc which I was looking at for ideas, guess other Intel parts are similarly overcomplicated

[illumos-gate] 16740 libtopo: 'psn' may be used uninitialized -- Toomas Soome <tsoome⊙mc>